VLSI Circuits Symposium

An ReRAM SSD Design

Chuo University EmblemA colleague pointed The SSD Guy to an ExtremeTech article about researchers at Japan’s Chuo University who have designed an SSD that uses a resistive RAM (ReRAM) as a buffer and is built using TSV technology.  The design was presented at the IEEE’s 2012 Symposium on VLSI Circuits this month in Hawaii.  A Nikkei article gives additional information.

The basic architecture reminds me of an FRAM + NAND SSD design that a Korean university presented at the Flash Memory Summit a few years ago.  Either approach gets past the problem of using a failure-prone battery, a temperature-sensitive supercap, or a big bulky bank of Continue reading