There are more advanced means than simple error correction to help remove bit errors in NAND flash and those will be the subject of this post. The general term for this approach is “DSP” although it seems to have very little to do with the kind of DSP algorithm used to perform filtering or build modem chips.
While ECC corrects errors without knowing how they got there, DSP helps to correct any of the more predictable errors that are caused by internal error mechanisms that are inherent to the design of the chip. A prime example of such an error would be adjacent cell disturb.
Here’s a brief explanation of Continue reading “How Controllers Maximize SSD Life – Other Error Management”
A colleague pointed 
Seagate
Link_A_Media, recently graced with 
It’s tough to design an SSD controller, and even tougher to make one that can simply compete against the great ones that already ship in volume. To make a truly better controller would seem to require an astonishing effort. It appears that a company with a very odd name: 
DensBits, a flash memory controller company, has just introduced its new DB3610 “Memory Modem” eMMC controller for 3-bit or TLC flash. The controller is the first to use DensBits’ new technology which the company claims can coax better reliability out of 3-bit flash than most controllers can out of 2-bit MLC, to provide important cost savings to OEMs.