At January’s SNIA Persistent Memory Summit Intel was promoting a book titled: Programming Persistent Memory. This book, aimed at programmers, explains how to develop applications programs that take advantage of persistent memory (PM) to avoid slower persists to SSDs, and also shows how to use Intel’s Optane DIMMs to increase a system’s main memory size.
On the software side the book explains Continue reading “New Book Explains Persistent Memory Programming”
This post is the second of a two-part SSD Guy series outlining the nonvolatile DIMM or NVDIMM. The first part explained what an NVDIMM is and how they are named. This second part describes the software used to support NVDIMMs (BIOS, operating system, and processor instructions) and discusses issues of security.
Today’s standard software boots a computer under the assumption that the memory at boot-up contains random bits — this needed to be changed to support NVDIMMs. The most fundamental of these changes was to the BIOS (Basic I/O Subsystem), the code that “wakes up” the computer.
The BIOS is responsible for detecting all of the computer’s hardware and installing the appropriate drivers, after which it loads the bootstrap program from the mass storage device into the DRAM main memory. When an NVDIMM is used the BIOS must Continue reading “An NVDIMM Primer (Part 2 of 2)”
NVDIMMs are gaining interest lately, so The SSD Guy thought it might be worthwhile to explain both what they are and how NVDIMM nomenclature works.
As I was writing it I noticed that the post got pretty long, so I have split it into two parts. The first part explains what an NVDIMM is and defines the names for today’s three kinds of NVDIMM. The second part tells about software changes used to support NVDIMMs in BIOS, operating systems, and even processor instruction sets. It also discusses the problem of security.
In case the name is unfamiliar, NVDIMM stands for “Nonvolatile Dual-Inline Memory Module.” Standard computer memory – DRAM – is inserted into the system in the DIMM form factor, but DRAM loses its data when power is removed. The NVDIMM is nonvolatile, or persistent, so its data remains intact despite a loss of power. This takes some effort and always costs more for reasons that will be explained shortly.
Although might seem a little odd to discuss memory in a forum devoted to SSDs, which are clearly storage, the NVDIMM is a storage device, so it rightly Continue reading “An NVDIMM Primer (Part 1 of 2)”
Sometimes it’s enlightening to compare several viewpoints on similar data. At yesterday’s SNIA Persistent Memory Summit a number of presentations provided interesting overlapping views on certain subjects.
One of particular interest to The SSD Guy was latency vs. IOPS. Tom Coughlin of Coughlin Associates and I presented the findings from our recently-published IOPS survey report and in Slide 19 displayed the basic chart behind this post’s graphic (click to enlarge, or, better yet, right-click to open in a new tab). This chart compares how many IOPS our respondents said they need for the storage in their most important application, and compared that to the latency they required from this storage. For comparison’s sake we added a reference column on the left to roughly illustrate the latency of various standard forms of storage and memory.
You can see that we received a great variety of inputs spanning a very wide range of IOPS and latency needs, and that these didn’t all line up neatly as we would have anticipated. One failing of this chart format is that it doesn’t account for multiple replies for the same IOPS/latency combination: If we had been able to include that the chart would have shown a clearer trendline running from the top left to the lower right. Instead we have a band that broadly follows that trend of upper-left to lower-right.
Two other speakers presented the IOPS and latency that could be Continue reading “Latency, IOPS & NVDIMMs”
There’s been a lot of interest in NVRAM recently. This technology has been lurking in the background for decades, and suddenly has become very popular.
What is NVRAM? Quite simply, it’s DRAM or SRAM that has a back-up flash memory a small controller, and a battery or super-capacitor. During operation the DRAM or SRAM is used in a system the same way that any DRAM or SRAM would be used. When power is interrupted the controller moves all of the data from the DRAM or SRAM to the flash using the backup power from the battery or super-capacitor. When power is restored, the controller moves the contents of the flash back into the SRAM or DRAM and the processor can resume operation where it left off.
In some ways it’s storage and in some ways it’s memory, so Continue reading “Where does NVRAM Fit?”
Today NAND flash is being shoehorned into HDD formats simply because it is persistent – the data doesn’t disappear when the lights go out. This approach fails to take advantage of NAND’s greatest strength – its low cost relative to DRAM – and this prevents it from fully meeting the needs of most data centers.
Since 2004 NAND has been cheaper than DRAM, and today its price per gigabyte is an order of magnitude lower than that of DRAM. NAND is cheaper and slower than DRAM, and HDD is cheaper and slower than NAND.
A role better suited to NAND flash technology is Continue reading “White Paper: Using Flash as Memory”
