White Paper: Matching Flash to the Processor

Moving flash into the memory channel to get fast parallel performance I have just added a new white paper onto the Objective Analysis website: Matching Flash to the Processor – Why Multithreading Needs Parallelized Flash.

This document examines the evolution of today’s CPUs, whose clock frequencies have stopped increasing, but now exploit parallelism to scale performance.  Multiple DRAM channels have also been added to performance computing to add parallelism to the memory channel.

Storage hasn’t kept pace with this move to parallelism and that is limiting today’s systems.

New NAND flash DIMMs recently introduced by Diablo, SanDisk, and IBM, provide a reasonable approach to adding parallel flash to a system on the its fastest bus – the memory channel.  This white paper shows that storage can be scaled to match the processor’s growing performance by adding flash DIMMs to each of the many DRAM buses in a performance server.

The white paper is downloadable for free from the Objective Analysis home page.  Have a look.

IBM Launches Flash DIMMs

IBM's eXFlash DIMMOn Thursday IBM announced its X6 product family, the sixth generation of the company’s successful EXA server architecture.  A smaller byline of the introduction was the company’s new eXFlash memory-channel storage or eXFlash DIMM which is offered as one of many flash options available to X6 users.

Close followers of The SSD Guy already know that I am a serious advocate of putting flash onto the memory bus.  Why slow the technology down by Continue reading “IBM Launches Flash DIMMs”